|  | Introduction | 
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In this project we present Proknet, which is a play on the following words: network and processor. It represents a module that is capable of receiving incoming variable-sized IP packets, and outputting fixed-sized ATM cells. The applications of this module are numerous, especially in the communications field, where this type of circuit is needed in order to implement the ATM forum specifications.
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|  | Documents | 
|  | Presentations | 
|  | Team members | 
|  | Tools utilized 
Xilinx Foundation - v2.5 
Cadence NC-Verilog simulator
Synopsys Verilog Analyzer, Simulator and Debugger - v2000.06
Synopsys Design Analyzer - v2000.05
Synopsys Design Checker - v2000.05
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