l'ÉITI Recherche Nouvelles HREF= Répertoires Ressources Génie/Engineering Ud'O/UofO SITE Search News Directories Resources SITE

Introduction
In this project we present Proknet, which is a play on the following words: network and processor. It represents a module that is capable of receiving incoming variable-sized IP packets, and outputting fixed-sized ATM cells. The applications of this module are numerous, especially in the communications field, where this type of circuit is needed in order to implement the ATM forum specifications.
Documents
Presentations
Team members
Tools utilized

(all software tools supplied by the Canadian Microelectronics Corporation)

  • Xilinx Foundation - v2.5
  • Cadence NC-Verilog simulator
  • Synopsys Verilog Analyzer, Simulator and Debugger - v2000.06
  • Synopsys Design Analyzer - v2000.05
  • Synopsys Design Checker - v2000.05

Interesting Quote

"Simply stated, it is sagacious to eschew obfuscation."
--Norman Augustine
Rami S. Abielmona

School of Information Technology and Engineering (SITE), University of Ottawa
800 King Edward Ave., P.O. Box 450, Stn A,
Ottawa, Ontario, Canada, K1N 6N5
Tel: (613) 562-5800 ext. 2197, Fax: (613) 562-5175
Office/Lab: SITE Building, Room 3010
Email: rabielmo@site.uottawa.ca
Contactez: L'École d'ingénierie et de technologie de l'information /
Contact: School of Information Technology and Engineering
Copyright © 2002 Université d'Ottawa / University of Ottawa
Webmestre / Webmaster