ELG6158
(SYSC 5508) DIGITAL SYSTEMS ARCHITECTURE
PROFESSOR
Miodrag Bolic
School of Information Technology and Engineering (SITE),
University of Ottawa
Tel: (613) 562-5800 x 6224, Fax: (613) 562-5175
Email: mbolic@site.uottawa.ca
Web: www.site.uottawa.ca/~mbolic
Office Hours: Wednesday,
1:15-2:45, CBY A-616
COURSE DESCRIPTION
New architectural concepts are introduced. Discussion of programmable
architectures (micro-controllers, DSPs, GP) and FPGAs. Memory interfacing.
Scalable, superscalar, RISC, CISC, and VLIW concepts. Parallel structures:
SIMD, MISD, and MIMD. Fault tolerant systems and DSP architectures. Examples of
current systems are used for discussions.
COURSE SCHEDULE
Activity |
Time |
Location |
LEC |
Monday, 8:30 -11:30 |
MRT 211 |
LEC |
Wednesday,
8:30 -11:30 |
MRT 211 |
SUGGESTED TEXTS
First part of the course:
David A. Patterson, John L. Hennessy, Computer
Organization and Design: The Hardware/Software Interface, Morgan Kaufmann; 4rd
edition, 2008, ISBN: 978-0-12-374493-7.
R. Bryant, D.R. O'Hallaron, Computer systems: a
programmer's perspective, Prentice Hall, 2nd edition, 2011
William Stallings, Computer Organization and
Architecture, Prentice Hall; 6th edition, July 15, 2002, ISBN: 0130351199.
Second part of the course:
Parallel Computer Organization and Design, by Michel
Dubois, Murali Annavaram, Per Stenström, August 2012
Real World Multicore Embedded Systems, 1st Edition,
edited by B. Moyer, 2013.
Computer Architecture: A Quantitative Approach, by
John L. Hennessy, David A. Patterson, David Goldberg, Morgan Kaufmann; 3rd
edition, 2002.
PREREQUISITES
Carleton University: SYSC 4507
TOPICS DISCUSSED
(This is a very preliminary schedule)
Lecture # |
Topic |
Literature |
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VLIW |
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Multicore systems |
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Interconnection networks:Buses |
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Routing (Slides 1-12) Switching: Power Point Slides 51-57 and 124-138 from
http://ceng.usc.edu/smart/slides/appendixE.html
Timothy Mark Pinkston and Jose Duato. Appendix E
of Computer Architecture: A Quantitative Approach, 4th Ed, Elsevier
Publishers, 2006. |
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Practice
for the final |
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Final |
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MARKING SCHEME
·
Final exam (60%)
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Presentation and slides (20%)
·
Quizzes (20%)
PAPER ANALYSIS AND PRESENTATION
You need to present one chapter from the book “Real World Multicore Embedded Systems”. The presentations
will be to have 20 minutes long (about 20 slides and maximum 10 backup
slides).