An example of reachability analysis (taken from [Braek])

Note: This was included in the course notes of 2010. The notation for global states is slightly different than in the course notes of 2011. - Page with diagrams only

The idea is to explore all possible execution paths that may occur with different input sequences and different interleaving of internal transitions due to concurrency. This is called reachability analysis (one analyses the specification of the system to find all global states that are reachable from the initial state). A global system state consists of a particular state for each concurrent process participating in the system and the set of messages in transit (or in the case of SDL systems, the content of the input queues of all processes).

An example is given in the book by Braek: Figue 12.1 shows two SDL processes, and Figure 12.2 shows corresponding transition charts that include intermediate states (which represent the state of a process during a transition - after the acceptance of a new input, and before the generation of the output produced by that transition).

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Figure 12.3 (below) shows a reachability analysis (incomplete, since certain branches have not been explored). Each transition in the reachability diagram corresponds to an input accepted by a process or an output produced by a process (or the environment). The state at the bottom represents a deadlock: there is no transition that could be executed in this state. Notation: A global state, represented as an oval, is identified "x1, s1 / x2, s2z" where si (i = 1 or 2) is the state of the left or right state machine (respectively) and xi is the content of its input queue. Notes:

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